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  " for more information *       !              " AM29F200B known good wafer data sheet
supplement publication# 30332 rev: a amendment/ 0 issue date: april 22, 2003 AM29F200B known good wafer 2 megabit (256 k x 8-bit/128 k x 16-bit) cmos 5.0 volt-only, boot sector flash memory, die revision 1 note: this supplement contains information on the am 29f200b in known good wafer form. refer to the AM29F200B standard datasheet (publication 21526) for full electrical specifications. distinctive characteristics top or bottom boot block configurations available minimum 1,000,000 write cycle guarantee per sector 20-year data retention at 125 c tested to datasheet specifications at temperature quality and reliability levels equivalent to standard packaged components complies with jedec standards for wafer shipments general description the AM29F200B in known good wafer (kgw) form is an 2 mbit, 5.0 volt-only flash memory. amd defines kgw as standard product in wafer form, tested for func- tionality and speed. amd kgw products have the same reliability and quality as amd products in packaged form. electrical specifications refer to the AM29F200B data sheet, publication number 21526, for full electrical specifications on the AM29F200B in kgw form.
2 AM29F200B known good wafer april 22, 2003 supplement product selector guide note: refer to ?test conditions? for additional information related to speed options. die photograph die pad locations family part number AM29F200B kgw speed option (v cc = 5.0 v 10%) -55 (v cc = 5.0 v 5%) -75 (v cc = 5.0 v 5%) -90 -120 max access time, ns (t acc )557090120 max ce# access time, ns (t ce )557090120 max oe# access time, ns (t oe )30303550 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 28 29 30 34 35 37 38 39 40 41 31 32 33 26 27 42 36 amd logo location y x
april 22, 2003 AM29F200B known good wafer 3 supplement pad description pad locations relative to v cc . note: the coordinates above are relative to the die center and can be used to operate wire bonding equipment. pad signal pad center (mils) pad center (millimeters) xyxy 1v cc 0.00 0.00 0.0000 0.0000 2 dq4 ?6.80 0.00 ?0.1727 0.0000 3 dq12 ?12.80 0.00 ?0.3251 0.0000 4 dq5 ?18.60 0.00 ?0.4724 0.0000 5 dq13 ?24.50 0.00 ?0.6223 0.0000 6 dq6 ?30.30 0.00 ?0.7696 0.0000 7 dq14 ?36.30 0.00 ?0.9220 0.0000 8 dq7 ?42.10 0.00 ?1.0693 0.0000 9 dq15/a-1 ?48.00 0.00 ?1.2192 0.0000 10 v ss ?55.70 1.40 ?1.4148 0.0356 11 byte# ?57.50 ?6.50 ?1.4605 ?0.1651 12 a16 ?57.50 ?18.00 ?1.4605 ?0.4572 13 a15 ?57.10 ?124.90 ?1.4503 ?3.1725 14 a14 ?51.30 ?124.90 ?1.3030 ?3.1725 15 a13 ?45.90 ?124.90 ?1.1659 ?3.1725 16 a12 ?40.00 ?124.90 ?1.0160 ?3.1725 17 a11 ?34.60 ?124.90 ?0.8788 ?3.1725 18 a10 ?28.80 ?124.90 ?0.7315 ?3.1725 19 a9 ?23.30 ?124.60 ?0.5918 ?3.1648 20 a8 ?17.40 ?124.90 ?0.4420 ?3.1725 21 we# ?12.00 ?124.90 ?0.3048 ?3.1725 22 reset# ?2.40 ?128.60 ?0.0610 ?3.2664 23 ry/by# 9.50 ?128.60 0.2413 ?3.2664 24 a7 30.30 ?124.90 0.7696 ?3.1725 25 a6 35.80 ?124.90 0.9093 ?3.1725 26 a5 41.60 ?124.90 1.0566 ?3.1725 27 a4 47.00 ?124.90 1.1938 ?3.1725 28 a3 52.90 ?124.90 1.3437 ?3.1725 29 a2 58.30 ?124.90 1.4808 ?3.1725 30 a1 64.10 ?124.90 1.6281 ?3.1725 31 a0 64.50 ?18.00 1.6383 ?0.4572 32 ce# 64.50 ?6.50 1.6383 ?0.1651 33 v ss 64.50 3.80 1.6383 0.0965 34 oe# 55.00 2.30 1.3970 0.0584 35 dq0 47.40 0.00 1.2040 0.0000 36 dq8 41.50 0.00 1.0541 0.0000 37 dq1 35.60 0.00 0.9042 0.0000 38 dq9 29.70 0.00 0.7544 0.0000 39 dq2 23.90 0.00 0.6071 0.0000 40 dq10 18.00 0.00 0.4572 0.0000 41 dq3 12.10 0.00 0.3073 0.0000 42 dq11 6.20 0.00 0.1575 0.0000
4 AM29F200B known good wafer april 22, 2003 supplement ordering information standard products amd standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: valid combinations valid combinations list configurations planned to be sup- ported in volume for this device. consult the local amd sales office to confirm availability of specific valid combinations and to check on newly released combinations. AM29F200B t -75 wj c 1 die revision this number refers to the specific amd manufacturing process and product technology reflected in this document. it is entered in the revision field of amd standard product nomenclature. temperature range c = commercial (0c to +70c) i = industrial (?40 c to +85 c) e = extended (?55 c to +125 c) contact amd for higher temperature range devices. package type wj = wafer jar (contact factory for availability) speed option see product selector guide and valid combinations boot code sector architecture t = top sector b = bottom sector device number/description AM29F200B known good wafer 2 megabit (256 k x 8-bit/128 k x 16-bit) cmos flash memory 5.0 volt-only program and erase valid combinations AM29F200Bt-55, AM29F200Bb-55 (55 ns, v cc = 5.0 v 5%) wjc1, wji1, wje1 AM29F200Bt-75, AM29F200Bb-75 (70 ns, v cc = 5.0 v 5%) AM29F200Bt-90, AM29F200Bb-90 AM29F200Bt-120, AM29F200Bb-120
april 22, 2003 AM29F200B known good wafer 5 supplement wafer jar diagram 2 1 standard kgd label foam pad(s) filter paper (1x) wafer (1x) (circuitry face-down) max. 25 wafers in a jar foam pad(s)
6 AM29F200B known good wafer april 22, 2003 supplement product test flow figure 1 provides an overview of amd?s known good wafer test flow. for more detailed information, refer to the AM29F200B product qualification database. amd implements quality assurance procedures throughout the product test flow. these qa procedures also allow amd to produce kgw products without requiring or implementing burn-in. in addition, an off-line qualifica- tion maintenance program (qmp) guarantees amd quality standards are met on known good wafer prod- ucts. figure 1. amd kgw product test flow wafer sort 1 bake 24 hours at 250 c wafer sort 2 wafer sort 3 high temperature packaging for shipment shipment dc parameters functionality programmability erasability data retention dc parameters functionality programmability erasability dc parameters functionality programmability erasability speed incoming inspection 100% visual inspection wafer pack
april 22, 2003 AM29F200B known good wafer 7 supplement physical specifications wafer size . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mm active die . . . . . . . . . . . x = 3328.8 m; y = 3594.8 m . . . . . . . . . . . . . . . . . . . . x = 131 mils; y = 141.5 mils scribe width . . . . . . . . . . . . x = 91.2 m; y = 225.2 m . . . . . . . . . . . . . . . . . . . . . x = 3.59 mils; y = 8.87 mils step . . . . . . . . . . . . . . . . . . x = 3.42 mm; y = 3.82 mm . . . . . . . . . . . . . . . . . . . x = 134.6 mils; y = 150.4 mils wafer thickness . . . . . . . . . . . . . . . . . .483 +/?51 m bond pad size . . . . . . . . . . . . . . 3.74 mils x 3.74 mils . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 m x 95 m minimum pad pitch . . . . . . . . . . . . . . . . . . . . 137.8 m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.42 mils pad area free of passivation . . . . . . . . . .13.99 mils 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9,025 m 2 pads per die . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42 bond pad metalization . . . . . . . . . . . . . . . . . . . . al/cu . . . . . . . . . . . . . . . . . . . minimum thickness: 10500 ? die backside . . . . . . . . . . . . . . . . . . . . . . . . no metal, may be grounded with back-grind type finish (optional) passivation. . . . . . . . . . . . . . . . . . nitride/sog/nitride . . . . . . . . . . . . . . . . . . . minimum thickness: 14700 ? ink dot height . . . . . . . . . . . . . . . . . . . . . .0.8 mils max . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20.3 m max ink dot diameter . . . . . . . . . . . . . . . . . . . . .15 mils min . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381 m min edge die inked . . . . . . . . . . . . . . . . . . . . . . . . . . . . yes dc operating conditions v cc (supply voltage) . . . . . . . . . . . . . . . 4.5 v to 5.5 v junction temperature under bias: commercial, industrial, and extended temperature range . . . . .t j (max) = 130 c operating temperature commercial . . . . . . . . . . . . . . . . . . . 0 c to +70 c industrial . . . . . . . . . . . . . . . . . . . ?40 c to +85 c extended . . . . . . . . . . . . . . . . . . ?55 c to +125 c contact amd for higher temperature range devices. manufacturing information manufacturing . . . . . . . . . . . . . . . . . . . . . . . . . . . fasl test . . . . . . . . . . . . . . . . . . . . . . . . penang, malaysia manufacturing id (top boot) . . . . . . . . . . . . . 98480ak (bottom boot). . . . . . . . .98480abk preparation for shipment . . . . . . . . penang, malaysia fabrication process . . . . . . . . . . . . . . . . . . . . cs39s die revision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 special handling instructions processing do not expose kgw products to ultraviolet light or process them at temperatures greater than 250 c. failure to adhere to these handling instructions will result in irreparable damage to the devices. for best yield, amd recommends assembly in a class 10k clean room with 30% to 60% relative humidity. storage store at a maximum temperature of 30 c in a nitrogen- purged cabinet or vacuum-sealed bag. observe all standard esd handling procedures.
8 AM29F200B known good wafer april 22, 2003 supplement terms and conditions of sale for amd non-volatile memory die all transactions relating to unpackaged die or unpack- aged wafer(s) under this agreement shall be subject to amd?s standard terms and conditions of sale, or any revisions thereof, which revisions amd reserves the right to make at any time and from time to time. in the event of conflict between the provisions of amd?s stan- dard terms and conditions of sale and this agreement, the terms of this agreement shall be controlling. amd warrants its manufactured unpackaged die whether shipped to customer in individual dice or wafer form ("known good die," "kgd", "die," "known good wafer", "kgw", or wafer(s)) will meet amd's published specifications and against defective materials or work- manship for a period of one (1) year from date of ship- ment. this limited warranty does not extend beyond the first purchaser of said die or wafer(s). buyer assumes full responsibility to ensure compliance with the appropriate handling, assembly and pro- cessing of kgd or kgw (including but not limited to proper die preparation, die attach, backgrinding, sin- gulation, wire bonding and related assembly and test activities), and compliance with all guidelines set forth in amd's specifications for kgd or kgw, and amd assumes no responsibility for environmental effects on kgd or kgw or for any activity of buyer or a third party that damages the die or wafer(s) due to improper use, abuse, negligence, improper installation, improper backgrinding, improper singulation, accident, loss, damage in transit, or unauthorized repair or alteration by a person or entity other than amd ("limited war- ranty exclusions") the liability of amd under this limited warranty is lim- ited, at amd's option, solely to repair the die or wafer(s), to send replacement die or wafer(s), or to make an appropriate credit adjustment or refund in an amount not to exceed the original purchase price actu- ally paid for the die or wafer(s) returned to amd, pro- vided that: (a) amd is promptly notified by buyer in writing during the applicable warranty period of any defect or nonconformity in the die or wafer(s); (b) buyer obtains authorization from amd to return the defective die or wafer(s); (c) the defective die or wafer(s) is returned to amd by buyer in accordance with amd's shipping instructions set forth below; and (d) buyer shows to amd's satisfaction that such alleged defect or nonconformity actually exists and was not caused by any of the above-referenced warranty exclusions. buyer shall ship such defective die or wafer(s) to amd via amd's carrier, collect. risk of loss will transfer to amd when the defective die or wafer(s) is provided to amd's carrier. if buyer fails to adhere to these warranty returns guidelines, buyer shall assume all risk of loss and shall pay for all freight to amd's specified location. the aforementioned provisions do not extend the original limited warranty period of any die or wafer(s) that has either been replaced by amd. this limited warranty is expressed in lieu of all other warranties, expressed or implied, including the implied warranty of fitness for a particular purpose, the implied warranty of merchantability or noninfringement and of all other obliga- tions or liabilities on amd's part, and it neither assumes nor authorizes any other person to assume for amd any other liabilities. the foregoing consti- tutes the buyer's sole and exclusive remedy for the furnishing of defective or non conforming known good die or known good wafer(s) and amd shall not in any event be liable for increased manu- facturing costs, downtime costs, damages relating to buyer's procure- ment of substitute die or wafer(s) (i.e., "cost of cover"), loss of profits, reve- nues or goodwill, loss of use of ordamage to any associated equipment, or any other indirect, incidental, special or consequential damages by reason of the fact that such known good die or known good wafer(s) shall have been determined to be defective or non con- forming. buyer agrees that it will make no warranty representa- tions to its customers which exceed those given by amd to buyer unless and until buyer shall agree to indemnify amd in writing for any claims which exceed amd's limited warranty. known good die or known good wafer(s) are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of the die or wafer(s) can reasonably be expected to result in a personal injury. buyer's use of known good die or known good wafer(s) for use in life support applications is at buyer's own risk and buyer agrees to fully indemnify amd for any damages resulting in such use or sale. known good die or known good wafer are not designed or authorized for use as components in life support appliances, devices or systems where mal- function of the die or wafer can reasonably be expected to result in a personal injury. buyer's use of known good die or known good wafer for use in life support applications is at buyer's own risk and buyer agrees to fully indemnify amd for any damages resulting in such use or sale.
april 22, 2003 AM29F200B known good wafer 9 supplement revision summary revision a (april 22, 2003) initial release. trademarks copyright ? 2003 advanced micro devices, inc. all rights reserved. amd, the amd logo, and combinations thereof are r egistered trademarks of advanced micro devices, inc. product names used in this publication ar e for identification purposes only and may be trademarks of their respective companies .


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